Alif Semiconductor /AE302F80F5582AE_CM55_HP_View /DSI /DSI_PHY_TST_CTRL1

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Interpret as DSI_PHY_TST_CTRL1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PHY_TESTDIN0PHT_TESTDOUT0 (Val_0x0)PHY_TESTEN

PHY_TESTEN=Val_0x0

Description

PHY Test Interface Control Register 1

Fields

PHY_TESTDIN

PHY test interface input 8-bit data bus for internal register programming and test functionalities access.

PHT_TESTDOUT

PHY output 8-bit data bus for read-back and internal probing functionalities.

PHY_TESTEN

PHY test interface operation selector:

0 (Val_0x0): The data write operation is set on the rising edge of the TESTCLK signal.

1 (Val_0x1): The address write operation is set on the falling edge of the TESTCLK signal.

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